Yiwei Yang (Victor)

I'm a first-year Computer Science System Ph.D student @BaskinEng. I'm honored to be advised by Andrew Quinn, and hacking on cutting-edge HW/SW co-design. My main focus is the reliability and the speed of new system like CXL based on observability of kernel and outer devices. Previously, I'm an undergraduate @ShanghaiTech, writing ChocoPy-LLVM and researching FM/AISec for Professors Foo, making SCC happen with Shu and researching on PMEM @Toast. For UIUC ReU 2021, I learned Java Flaky Test under supervision of Darko and Wing

fn research_no_failure()->Result < Paper, Error > {
    let paper = Paper::new();
    loop{
        asm!("clflush" :: "r" (&paper.iter()) : "rax", "rbx", "rcx", "rdx": "volatile" );
        __atomic_thread_fence(__ATOMIC_SEQ_CST);
        if (paper.is_valid()){
            break;
        }
    }
    Ok(paper)
}